Verilog sources for Western Digital’s open source RISC-V core

Verilog sources for Western Digital’s open source RISC-V core

SweRV can be configured by running the script:

For example to build with a DCCM of size 64 :

This will update the default snapshot in with parameters for a 64K DCCM. This script derives the following consistent set of include files :

Set the RV_ROOT environment variable to the root of the SweRV directory structure (Skip if default is sufficient)

(Name your snapshot to distinguish it from the default. Without an explicit name, it will update/override the default snapshot)

Snapshots are placed in directory

This will create and populate the verilator obj_dir/ in the current work dir.

Source: github.com