Gallery of Processor Cache Effects

In the body of the first loop, operations depend on each other as follows:

But in the second example, we only have these dependencies:

The modern processor has various parts that have a little bit of parallelism in them: it can access two memory locations in L1 at the same time, or perform two simple arithmetic operations. There are three possible approaches to mapping cache slots to memory chunks:

Direct mapped caches can suffer from conflicts – when multiple values compete for the same slot in the cache, they keep evicting each other out, and the hit rate plummets. On some processors, L1 cache can process two accesses in parallel if they access cache lines from different banks, and serially if they belong to the same bank.

Source: igoro.com