Microamp: Asymmetric Multi-Processing on Microcontrollers

This can be seen in the output of the program where each core reports a different address of the variable . For example, if we place the and sections of both images (core #0’s contains the variable) at address (that is in BTCM0) it would become possible to break Rust aliasing rule with no code. Regardless of the performance, we must default to a memory safe program layout so we’ll pick the following layout:

Rationale: References to stack variables can not be sent to a different core because they have non-static lifetimes and to place a value in a static variable it must only contain static lifetimes ( there’s an implicit bound on all static variables).

Source: blog.japaric.io