A Superscalar Out-of-Order x86 Soft Processor for FPGA

Superscalar out-of-order processor microarchitectures have been used successfully for hard processors for many years, and promise large performance gains if they can also be used for FPGA soft processors. This thesis presents the design of the microarchitecture and circuits of a two-issue (superscalar) out-of-order x86 FPGA soft processor. Beyond the proposed microarchitecture, the processor circuits presented in this thesis will enable new out-of-order soft processor microarchitectures of varying performance, cost, and instruction set, created from variations of our circuits.

Source: tspace.library.utoronto.ca