RISC-V from scratch 2: Hardware layouts, linker scripts, and C runtimes

In the first post of this series, we introduced RISC-V, explained why it’s important, set up the full GNU RISC-V toolchain, and built and ran a simple program on an emulated version of a RISC-V processor with the help of SiFive’s freedom-e-sdk. This gives us a file called , which has lots of interesting information about such as the number of available CPU cores, the memory location of various peripherals such as the UART, and the memory location of the onboard memory (RAM). This snippet summarizes it well:

Knowing this, let’s copy the default linker script uses into a new file:

There’s a lot of interesting information in this file, much more than we can review in this post.

Source: twilco.github.io